PERANCANGAN DISKRIT D FLIP-FLOP MENGGUNAKAN TEKNOLOGI CMOS 0.35 µm

Widyastuti Widyastuti(1*), Hamzah Afandi(2), Ganjar Febriyani Pratiwi(3)


(1) 
(2) 
(3) 
(*) Corresponding Author

Abstract


Accumulator dump is one of the tools used to convert serial data into parallel data on RFID communications. Accumulator dump on RFID communication consists of a series of counters and registers, where one of the supporting circuits in the counter and register is D flip-flop. D flip-flops are one type of flip-flop that is built using RS flip-flops. Discrete circuit design Master-slave flip-flops  are  built  using  NAND  logic  gates  built  using  0.35  µ m  CMOS technology. The results of the D flip-flop circuit design are simulated using LT- SPICE software to see the speed of response and power dissipation in the circuit.

Keywords: RFID, CMOS 0.35 µ m, D flip-flop, Dump Accumulator, NAND logic

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